[ISCA] Daehyeon Baek, Soojin Hwang, and Jaehyuk Huh, "pSyncPIM: Partially Synchronous Execution of Sparse Matrix Operations for All-bank PIM Architectures", The 51st International Symposium on Computer Architecture (ISCA), June, 2024
[HPCA] Seonjin Na, Jungwoo Kim, Sunho Lee, and Jaehyuk Huh, "Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management", the 30th IEEE International Symposium on High-Performance Computer Architecture (HPCA), March, 2024 [paper][slide]
[TACO] Soojin Hwang, Daehyeon Baek, Jongse Park, and Jaehyuk Huh, "Cerberus: Triple Mode Acceleration of Sparse Matrix and Vector Multiplication", ACM Transactions on Architecture and Code Optimization [LINK]
[TACO] Joongun Park, Seunghyo Kang, Sanghyeon Lee, Taehoon Kim, Jongse Park, Youngjin Kwon, and Jaehyuk Huh, "Hardware Hardened Sandbox Enclaves for Trusted Serverless Computing", ACM Transactions on Architecture and Code Optimization 21(1) [LINK][slide]
2023
[MICRO] Jungwoo Kim, Seonjin Na, Sanghyeon Lee, Sunho Lee, and Jaehyuk Huh, "Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training", 56th IEEE/ACM International Symposium on Microarchitecture (MICRO), October, 2023 [paper] [slide]
[IISWC] Soojin Hwang*, Sunho Lee*, Jungwoo Kim, Hongbeen Kim, and Jaehyuk Huh, "mNPUsim: Evaluating the Effect of Sharing Resources with Multi-Core NPUs", 2023 IEEE International Symposium on Workload Characterization, October, 2023 [paper] [slide][simulator source github]
(*: equal contribution)
2022
[USENIX ATC] Seungbeom Choi, Sunho Lee, Yeonjae Kim, Jongse Park, Youngjin Kwon, and Jaehyuk Huh, "Serving Heterogeneous Machine Learning Models on Multi-GPU Servers with Spatio-Temporal Sharing", The 2022 USENIX Annual Technical Conference (ATC), July, 2022 [paper][slide][source github]
[HPCA] Sunho Lee, Jungwoo Kim, Seonjin Na, Jongse Park, and Jaehyuk Huh, "TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit", the 28th IEEE International Symposium on High-Performance Computer Architecture (HPCA), April, 2022 [paper][slide]
[ICCD] Bokyeong Kim, Soojin Hwang, Sanghoon Cha, Chang Hyun Park, Jongse Park and Jaehyuk Huh, "Supporting Dynamic Translation Granularity for Hybrid Memory Systems", The 40th IEEE International Conference on Computer Design (ICCD), October, 2022 [paper][slide]
[ICCD] Sunho Lee, Seonjin Na, Jungwoo Kim, Jongse Park and Jaehyuk Huh, "Tunable Memory Protection for Secure Neural Processing Units", The 40th IEEE International Conference on Computer Design (ICCD), October, 2022 (Short Paper) [paper][slide]
[TC] Taekyung Heo, Yang Wang, Wei Cui, Jaehyuk Huh, and Lintao Zhang, "Adaptive Page Migration Policy with Huge Pages in Tiered Memory Systems", IEEE Transactions on Computers, vol 71 (1), January, 2022 [LINK][source github]
2021
[PACT] Daehyeon Baek, Soojin Hwang, Taekyung Heo, Daehoon Kim, and Jaehyuk Huh, "InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-aware Inner Product Processing", The 30th International Conference on Parallel Architectures and Compilation Techniques (PACT) September, 2021, [paper][slide]
[ISCA] Yeonju Ro, Seongwook Jin, Jaehyuk Huh, and John Kim, "Ghost Routing to Enable Oblivious Computation on Memory-centric Networks", The 48th International Symposium on Computer Architecture (ISCA), June, 2021, [paper]
[HPCA] Seonjin Na, Sunho Lee, Yeonjae Kim, Jongse Park, and Jaehyuk Huh, "Common Counters: Compressed Encryption Counters for Secure GPU Memory", the 27th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feburary 2021, [paper][slide]
[TACO] Wonik Seo, Sanghoon Cha, Yeonjae Kim, Jaehyuk Huh, and Jongse Park, "SLO-aware Inference Scheduler for Heterogeneous Processors in Edge Platforms", ACM Transactions on Architecture and Code Optimization, vol 13 (4), July, 2021 [LINK]
2020
[ISCA] Joongun Park, Naegyeong Kang, Taehoon Kim, Youngjin Kwon, and Jaehyuk Huh, "Nested Enclave: Supporting Fine-grained Hierarchical Isolation with SGX", The 47th International Symposium on Computer Architecture (ISCA), May, 2020, [paper][slides]
[ISCA] Chang Hyun Park, Sanghoon Cha, Bokyeong Kim, Youngjin Kwon, David Black-Schaffer, and Jaehyuk Huh, "Perforated Page: Supporting Fragmented Memory Allocation for Large Pages", The 47th International Symposium on Computer Architecture (ISCA), May, 2020, [paper][slides]
[TPDS] Taeklim Kim, Chang Hyun Park, Jaehyuk Huh, and Jeongseob Ahn, "Reconciling Time Slice Conflicts of Virtual Machines with Dual Time Slice for Clouds", IEEE Transactions on Parallel and Distributed Systems 31 (10), October 2020, [LINK]
2019
[ASPLOS] Insu Jang, Adrian Tang, Taehoon Kim, Simha Sethumadhavan, and Jaehyuk Huh, " Heterogeneous Isolated Execution for Commodity GPUs ", the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April 2019, [paper] [slides]
[TDSC] Ohmin Kwon, Yonggon Kim, Jaehyuk Huh, Hyunsoo Yoon, "ZeroKernel: Secure Context-isolated Execution on Commodity GPUs", IEEE Transactions on Dependable and Secure Computing (TDSC), 18 (4), July/August 2021, [LINK]
[TACO] Sanghoon Cha, Bokyeong Kim, Chang Hyun Park, and Jaehyuk Huh, "Morphable DRAM Cache Design for Hybrid Memory Systems", ACM Transactions on Architecture and Code Optimization (TACO), 16 (3), July 2019 [LINK]
[Workshop] Kwangwon Koh, Kangho Kim, Changdae Kim, and Jaehyuk Huh, "End Performance SLA Support for Disaggregated Memory", The 1st Workshop on Resource Disaggregation (WORD 2019) held in conjunction with ASPLOS 2019.
[PACT] Seikwon Kim, Seonyoung Lee, Taehoon Kim, and Jaehyuk Huh, "Transparent Dual Memory Compression Architecture", the 26th International Conference on Parallel Architectures and Compilation Techniques (PACT), September, 2017, [paper] [slides]
[ICPADS] Sangwon Seo, Jae-Hong Kim, Sangbae Yun, Jaehyuk Huh, and Seungryoul Maeng, "HePA: Hexagonal Platform Architecture for Smart Home Things", The 21st IEEE International Conference on Parallel and Distributed Systems (ICPADS), December, 2015, [LINK]
[ICS] Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, and Stephen W. Keckler, "Author Retrospective for A NUCA Substrate for Flexible CMP Cache Sharing", a retrosepctive for one of 35 papers selected among 1800 papers published in ICS for the last 25 years, ICS 25th Anniversary Volume, 2014, [paper]
[HPDC] Jongse Park, Daewoo Lee, Bokyeong Kim, Jaehyuk Huh, and Seungryoul Maeng, "Locality-Aware Dynamic VM Reconfiguration on MapReduce Clouds", The 21st International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC'12), June, 2012, [paper]
[SC] Hanjoon Kim, Seulki Heo, Junghoon Lee, Jaehyuk Huh, and John Kim, "On-Chip Network Evaluation Framework", Supercomputing 2010, New Orleans, USA, November, 2010, [LINK]
[TPDS] Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, and Stephen W. Keckler, "A NUCA Substrate for Flexible CMP Cache Sharing", IEEE Transactions on Parallel and Distributed Systems 18 (8), Aug 2007, [LINK]
2005
[ICS] Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, and Stephen W. Keckler, "A NUCA Substrate for Flexible CMP Cache Sharing", The 19th ACM International Conference on Supercomputing (ICS'05), June, 2005, [paper].
2004
[IEEE Micro] Jaehyuk Huh, Doug Burger, Jichuan Chang, Gurindar S. Sohi, "Speculative Incoherent Cache Protocols", IEEE Micro Special Issue (2004 Top Picks in Computer Architecture), Nov/Dec 2004
[ASPLOS] Jaehyuk Huh, Jichuan Chang, Doug Burger, and Gurindar S. Sohi, "Coherence Decoupling: Making Use of Incoherence", The 11th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XI), October, 2004, [paper]
[TACO] K. Sankaralingam, R. Nagarajan, H. Liu, C. Kim, Jaehyuk Huh, N. Ranganathan, D. Burger, S. W. Keckler, R. G. McDonald, and C. R. Moore, "TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP," ACM Transactions on Architecture and Code Optimization (TACO), March 2004
2003
[IEEE Micro] K. Sankaralingam, R. Nagarajan, H. Liu, C. Kim, Jaehyuk Huh, D.C. Burger, S.W. Keckler, and C.R. Moore, "Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture," IEEE Micro Special Issue (Top Picks in Computer Architecture), Nov/Dec 2003.
[PACT] Jaehyuk Huh, Doug Burger, and Stephen W. Keckler, "Exploring the Design Space of Future CMPs", The 10th International Conference on Parallel Architectures and Compilation Techniques (PACT), September, 2001, [paper]